표 1. | Table 1.
D-대역 주파수 체배기의 성능 비교표 | Comparison table of the performances of the D-band frequency multiplier.

Ref.	Technology	Multiplication factor	Freq. (GHz)	3-dB BW (GHz)	Psat (dBm)	CG (dB)	Pdc (mW)	η (%)	Size (mm2)	Integration
[4]	130 nmSiGeBiCMOS	×4	110～170	60	8	6	278.5	2.25	0.4452)	Quadrupler,Amp.
[5]	130 nmSiGeBiCMOS	×5	114～126	12	−3.8	−11.8	59	0.64	0.2622)	Amp.buffer
[6]	45 nmSOI CMOS	×9	150	>20	3	N/A	108	N/A	0.2881)	STD,tripler,90° hybrid coupler,Amp.
[7]	0.12 umSiGe HBT	×6	128	37	4.5	0.2	310	0.9	0.351)	tripler,doubler,Amp.
[8]	60 nmCMOS	×9	117～129.3	12.3	6.3	−4	328	1.26	0.1312)	tripler,Amp.
This work	40 nmCMOS	×9	125～137	12	3.4	3.4	170	1.28	0.2351)	STD,tripler,90° hybrid coupler,Amp.

The core size excluding the pads.
The estimated core size from chip micrograph.