표 2. | Table 2. 소스 펄스 요구조건과 등가회로모델 간 관계식 | Relationship between source pulse requirements and equivalent circuit model.
Source pulse requirements
Equivalent circuit model
α
1
(
R
p
p
‖
R
s
p
)
C
p
p
β
1
(
R
p
n
‖
R
s
n
)
C
p
n
t
peak
1
β
−
α
(
ln
(
α
β
)
)
Î
V
g
R
p
+
R
s
(
e
−
α
t
p
e
a
k
−
e
−
β
t
p
e
a
k
)
K
DE
{
(
α
β
)
β
β
−
α
−
(
α
β
)
α
β
−
α
}
−
1